|
Edward S. Davidson is a professor emeritus in Electrical Engineering and Computer Science at the University of Michigan, Ann Arbor. His research interests include computer architecture, pipelining theory, parallel processing, performance modeling, intelligent caches, and application tuning. In the 70s, he developed the reservation table approach to optimum design and cyclic scheduling of pipelines, designed and implemented an eight-node symmetric multiprocessor (SMP) system in 1976, and developed a variety of systematic methods for modeling performance and enhancing systems, including early work on simulated annealing, wave pipelining, multiple instruction stream pipelines, decoupled access-execute architecture, and polycyclic scheduling (aka software pipelining). He is a Fellow of the IEEE. ==Education== *1961 Harvard University, B.A. in Mathematics *1962 University of Michigan, M.S. in Communication Science *1968 University of Illinois, Ph.D. in Electrical Engineering 抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)』 ■ウィキペディアで「Edward S. Davidson」の詳細全文を読む スポンサード リンク
|